--- author: a16z date: '2026-10-09' guest: '' layout: post.njk source: https://www.youtube.com/watch?v=1Q_7yU7FZ1k speaker: a16z tags: - hardware-architecture - memory-wall - datacenter-infrastructure - energy-capacity title: 英特尔前CEO帕特·基辛格深度对话：为什么现在是硬件创新的黄金时代？ summary: 英特尔前CEO帕特·基辛格深入剖析算力、芯片与硬件创新的未来。从EDA演进与芯片设计周期，到内存墙危机、铁电新型存储与硅光互连，再到数据中心面临的严峻能源瓶颈与AI代理基础设施，系统阐明为何物理层创新正迎来文艺复兴。 insight: '' draft: true series: '' category: architecture area: tech-engineering project: [] people: [] companies_orgs: - Intel - VMware - Playground Global products_models: [] media_books: [] status: evergreen --- ### 序幕：硬件创新的文艺复兴与能源瓶颈 **帕特·基辛格**: 在人工智能驱动的数字经济时代，**能源容量**已经直接等同于**经济容量**。如果你无法获得足够的电力供应，那么在数据中心建造一座大楼并采购100万块GPU又有什么意义呢？由于能源极度短缺，许多大型数据中心项目的违约与延期率正在不断攀升。
Original English **Pat Gelsinger**: In the digital AI era, energy capacity equals economic capacity. If you cannot provide power, what is the point of constructing a massive datacenter building and purchasing a million GPUs? Because of severe energy shortages, project default rates for datacenters are heading higher and higher.
**拉古·拉古拉姆**: 我们正在见证整个计算堆栈的剧烈重构。以前设计一个服务器机架可能需要耗费数月甚至更长时间，而如今真正的瓶颈正在从纯芯片架构转移到电力、互连与系统级集成。
Original English **Raghu Raghuram**: We are seeing a complete reshaping across the compute stack. Designing a rack used to take months, but today the real bottlenecks are moving from pure chip architectures toward power, interconnects, and total systems integration.
**帕特·基辛格**: 没错。大约25到30年前，业界就宣称铜互连的时代即将终结，存储创新的极限也已来临，但工程技术的演进一次次打破了预期。对于硬件研发者而言，当前的环境绝非修修补补，而是一场名副其实的**硬件文艺复兴**。市面上涌现了上百家AI推理加速芯片初创公司，虽然最终行业会不可避免地经历洗牌与整合，但整个底层物理体系的重塑才刚刚拉开序幕。
Original English **Pat Gelsinger**: Exactly. Thirty years ago, people declared that copper was dead and memory innovation was hitting a brick wall, but engineering continued to push forward. For hardware leaders, this is truly a renaissance. We've seen roughly a hundred AI accelerator and inference processor startups emerge. While consolidation is inevitable, the complete reinvention of physical systems has only just begun.
### 从技术学徒到486首席架构师的早期岁月 **拉古·拉古拉姆**: 今天我们非常荣幸邀请到了一位德高望重的重磅嘉宾、我的挚友兼前老板——**帕特·基辛格（Pat Gelsinger）**。帕特目前是**Playground Global**的普通合伙人，但他更为人熟知的身份是**英特尔前首席执行官兼首任首席技术官**，以及**VMware**的前任首席执行官。帕特，非常欢迎你！
Original English **Raghu Raghuram**: We have a very distinguished guest today, a dear friend and my former boss, Pat Gelsinger. Pat is currently a General Partner at Playground Global, but is renowned throughout the industry as former CEO and the first CTO of Intel, as well as former CEO of VMware. Welcome, Pat!
**帕特·基辛格**: 嘿，谢谢拉古！很高兴能和你还有**圭多·阿彭策勒（Guido Appenzeller）**坐在一起。回到这里感觉就像回家一样亲切。看到你们依然精力充沛，真是太棒了。让我们直接切入正题吧！
Original English **Pat Gelsinger**: Hey, thank you, Raghu! It's great to be here with you and Guido. It feels like old times and feels like coming home. You guys haven't changed a bit and look full of energy. Let's get right into it!
**拉古·拉古拉姆**: 让我们先从你早年在英特尔的传奇经历聊起。如今许多年轻人都在讨论早期职业发展，而你当年的路径非常独特——你来自一所职业技术学校，18岁就加入了英特尔，开启了不可思议的工程生涯。能和我们分享一下当年的经历吗？
Original English **Raghu Raghuram**: Let's start with your early career at Intel. A lot of young people talk about career journeys today, but yours was truly remarkable: you went to a technical vocational institute, and by 18 you were already working at Intel. What was that experience like?
**帕特·基辛格**: 回想起来真是一段不可思议的奇遇。我16岁时机缘巧合获得了一笔奖学金，进入了一所技术学院。完成了一年半的密集课程后，18岁的我甚至从未坐过飞机，就接受了英特尔面试官罗恩·史密斯（Ron Smith）的面试。我是第12位应试者，当时的我年轻气盛、充满自信，最终成功入职。此后英特尔资助我完成了学士、硕士乃至博士阶段的核心课程。白天在实验室攻关第一线工程难题，晚上去大学研读微架构理论，理论与实战紧密交织，那是我能想象到的最完美的职业开局。
Original English **Pat Gelsinger**: Looking back, it was truly magical timing. When I was 16, I won a scholarship to a technical institute. After a year and a half of coursework, at age 18—having never even flown on an airplane before—I was interviewed by Intel's Ron Smith. I was the twelfth candidate, aggressive and arrogant, and got hired. Intel supported my bachelor's, master's, and doctoral coursework. Studying microarchitecture theory by night and practicing chip design on the frontlines by day was the best career start imaginable.
**圭多·阿彭策勒**: 那真是一个波澜壮阔的时代。你在斯坦福大学求学期间，正是现代计算机体系结构理论大爆发的阶段，你直接与很多学界先驱交流，并将学术突破直接带回了英特尔的芯片设计中。
Original English **Guido Appenzeller**: That was an extraordinary era. While taking classes at Stanford, you were right at the epicenter of the revolution in computer systems architecture, engaging directly with academic pioneers and bringing those insights straight into Intel's silicon.
**帕特·基辛格**: 确实如此。当时斯坦福大学的教授们正在探讨超前进位加法器等前沿逻辑设计，甚至计划将其写入教科书。而我们在开发**Intel 386**和后来的**Intel 486**时，就已经在实际芯片中落地了超前进位和内置自测试（BIST）技术。我的导师爱德华·麦克劳斯基（Edward McCluskey）教授是数字逻辑测试领域的泰斗。在硅谷，学术界的前沿研究与工业界的芯片研发就像同一股激流，初创企业与巨头相互碰撞，催生了包括思科、Sun Microsystems在内的整个现代计算工业。
Original English **Pat Gelsinger**: Very much so. Professors at Stanford were lecturing on lookahead carry adders and planning to publish them in textbooks, while we were already putting lookahead carry and built-in self-test (BIST) onto real 386 and 486 chips. My graduate advisor, Professor Edward McCluskey, was a legendary figure in testing. Academia and industry flowed into each other like water, powering companies like Cisco and Sun Microsystems and defining modern computing.
### 从手工多边形到现代EDA工具链的诞生 **拉古·拉古拉姆**: 当你担任**Intel 486**的首席架构师时，芯片设计流程与今天完全不可同日而语。当时的EDA（电子设计自动化）工具才刚刚起步，你们几乎是在一片空白中发明现代芯片工程方法学。
Original English **Raghu Raghuram**: When you served as the chief architect of the Intel 486, the chip design process was radically different from what we see today. Electronic Design Automation (EDA) was in its infancy, and you essentially had to invent the methodology as you went.
**帕特·基辛格**: 没错。在486之前，许多电路布局还是纯手工绘制多边形。为了实现486复杂的微处理器流水线和紧凑的面积目标，我们不得不自己发明专用语言和仿真工具。正是在那个时期，自动布局布线、静态时序分析、逻辑综合以及**EDA行业**真正破土而出。随着EDA的成熟，设计数百万甚至数千万晶体管的芯片才从一门艺术变成了工程科学。
Original English **Pat Gelsinger**: Exactly. Prior to the 486, much of the circuit layout was still drawn manually as polygons. To build the complex pipelined architecture of the 486 within our power and area budgets, we had to invent our own domain-specific languages and custom simulators. That crucible catalyzed automated place-and-route, static timing analysis, and the birth of the commercial EDA industry, transforming multi-million transistor design from a craft into an engineering discipline.
**圭多·阿彭策勒**: 对比当年和现在，今天的芯片设计团队已经拥有了极度强大的工具链，甚至开始引入AI辅助布局布线。然而，现代芯片的光掩模（mask set）成本高达数千万美元，流片周期的压力依然极其沉重。
Original English **Guido Appenzeller**: Comparing then to now, modern design teams have access to immensely sophisticated toolchains and are beginning to leverage AI for routing and synthesis. Yet, full mask sets for advanced nodes cost tens of millions of dollars, making tape-out turnaround times and verification pressures just as intense as ever.
**帕特·基辛格**: 确实，今天一套先进节点的掩模成本动辄超过5000万美元。如果你在设计上花了三个月，但流片和验证却要等九个月甚至一年，这种漫长周期的商业风险是巨大的。如何利用AI工具和新一代仿真平台将迭代周期从数月压缩到数周，依然是整个硬件产业追求的圣杯。但正因如此，工具的革命让小型精英团队也能完成过去数百人才能胜任的系统架构设计。
Original English **Pat Gelsinger**: Indeed, advanced mask sets today can run north of $50 million. If you spend three months designing and then wait nine months for fab delivery and validation, the economic stakes are astronomical. Compressing that iteration loop from quarters to weeks using modern AI-driven synthesis and emulation is the holy grail. But these modern tools also empower small, nimble teams to design systems that previously required hundreds of engineers.
### AI芯片大乱斗：从上百家初创到生态整合 **拉古·拉古拉姆**: 在过去几年中，伴随着大语言模型和生成式AI的爆发，风投资本疯狂涌入芯片领域。行业里一度出现了近百家专注于AI训练与推理的芯片初创公司。帕特，从产业历史周期来看，这种群雄逐鹿的格局会如何演进？
Original English **Raghu Raghuram**: Over the past few years, fueled by the LLM and generative AI explosion, venture capital poured billions into silicon. We witnessed nearly a hundred startups building dedicated AI training and inference processors. Looking through the lens of semiconductor history, how do you see this competitive landscape shaking out?
**帕特·基辛格**: 半导体历史上出现过很多次类似的狂潮——无论是早期的微处理器大繁荣、PC图形加速卡时代，还是网络处理器（NPU）热潮。初期总会有上百家公司拿到融资蜂拥而入，但历史规律表明，最终真正能够生存下来并建立持久商业壁垒的往往只有两到三家，最多不超过五家。
Original English **Pat Gelsinger**: Semiconductor history repeats itself—whether during the early microprocessor boom, the graphics accelerator wave, or the network processor era. You always see fifty to a hundred companies funded in the euphoric phase. But historical precedent proves that only two or three, rarely more than five, survive to build sustainable, defensible platforms.
**圭多·阿彭策勒**: 造成这种剧烈淘汰的核心原因是什么？仅仅是硬件性能指标（TOPS/Watt）的差异吗？
Original English **Guido Appenzeller**: What is the root cause behind this ruthless consolidation? Is it purely a matter of raw hardware metrics like TOPS per watt?
**帕特·基辛格**: 绝非仅仅是硅片本身的指标。决定生死的是**软件栈与开发者生态**！你可以设计出纸面性能极其出色的硬件加速器，但如果开发者必须为了你的架构重写核心模型、调试编译器并维护专属算子库，客户根本不会买单。建立成熟的编译器生态、支持PyTorch等主流框架、以及保证千万级代码库的向下兼容，所需要的资金与工程投入往往数倍于芯片本身的硬件研发。最终，绝大多数没有形成软件飞轮的公司都会被兼并或淘汰。
Original English **Pat Gelsinger**: It is never just about raw silicon performance. The deciding factor is the software stack and developer ecosystem! You can design a brilliant processor, but if practitioners have to rewrite kernels, debug bespoke compilers, and maintain custom libraries, adoption flatlines. Sustaining a tier-one compiler team, deep PyTorch optimization, and backward-compatible runtimes costs far more than the physical chip design itself. Companies without an impenetrable software moat inevitably consolidate or disappear.
### 撞击“内存墙”：从HBM极限到新型铁电存储 **拉古·拉古拉姆**: 让我们深入探讨当前计算架构面临的最大物理瓶颈——**内存墙（Memory Wall）**。在大模型推理中，算力往往被内存带宽和访问延迟死死卡住。
Original English **Raghu Raghuram**: Let's dive deep into the single biggest physical bottleneck constraining AI today: the memory wall. In large model inference, compute units sit idle waiting for memory bandwidth and latency.
**帕特·基辛格**: 算力与存储之间的脱节已经达到了极其严峻的地步。现代GPU和AI加速器的算力每隔两年成倍激增，但传统SRAM和标准DRAM的密度提升却严重滞后。为了喂饱这些饥渴的计算核心，行业转向了**高带宽内存（HBM）**，通过TSV硅通孔技术将多个DRAM裸片垂直堆叠。但HBM无论在制造成本、封装复杂度、成品率还是功耗方面，都正在迅速逼近工程物理极限。
Original English **Pat Gelsinger**: The divergence between compute throughput and memory capacity has reached a crisis point. Compute scales exponentially, while conventional SRAM and DRAM scaling has virtually flattened. To feed hungry cores, the industry turned to High Bandwidth Memory (HBM), stacking DRAM dies with through-silicon vias (TSVs). But HBM is rapidly hitting structural limits in packaging yield, thermal dissipation, and astronomical manufacturing costs.
**圭多·阿彭策勒**: 你在Playground Global关注了许多底层材料与新型存储的早期创新。未来的突破口究竟在哪里？我们能否期待在物理材料层面颠覆当前的存储范式？
Original English **Guido Appenzeller**: At Playground Global, you are tracking deep-tech bets on novel memory and materials. Where do you see the fundamental breakthrough? Can we expect true material-level disruptions to replace existing paradigms?
**帕特·基辛格**: 答案是肯定的，这正是为什么我认为现在是硬件创新的黄金时代！我们正在看到**铁电材料（Ferroelectric RAM）**等全新非易失性存储技术的崛起。新型材料不仅能提供超越标准DRAM的存储密度，而且可以在逻辑晶圆的后端制程（BEOL）中直接多层堆叠，无需昂贵的微凸块（micro-bumps）或复杂的中介层封装。当存储可以直接紧贴计算核心制造并实现三维异构集成时，我们就有机会以数分之一的功耗突破冯·诺依曼架构的瓶颈。
Original English **Pat Gelsinger**: Absolutely, and that is precisely why this is hardware's finest hour! We are seeing breakthroughs in novel materials such as ferroelectrics (FeRAM) and emerging non-volatile technologies. These materials offer densities exceeding conventional DRAM and can be monolithically stacked in the back-end-of-line (BEOL) directly above logic circuits, eliminating expensive micro-bumps and interposers. When memory is integrated directly against the compute fabric in true 3D fashion, we can shatter the Von Neumann bottleneck at a fraction of the energy cost.
### 封装革命与光互连：硅光技术的理想与现实 **拉古·拉古拉姆**: 随着单芯片尺寸触及光刻掩模版极限（Reticle Limit），**先进封装与Chiplet（芯粒）架构**已经成为全行业的共识。但随着小芯片数量增加，芯片间以及机架间通信的能耗占比急剧飙升。
Original English **Raghu Raghuram**: With single-die footprints hitting the physical reticle limit, advanced packaging and chiplet architectures have become mainstream. However, as chiplet counts explode, the power consumed purely by inter-die and inter-rack communication is skyrocketing.
**帕特·基辛格**: 看看现在的物理能耗分布：在芯片内部进行一次浮点数运算可能只需要零点几个皮焦耳（picojoule）甚至飞焦耳（femtojoule），但要将一个比特的数据通过铜导线传输过几厘米的基板或几十公分的线缆，消耗的能量往往要高出上千倍！我们把巨额电力浪费在了在铜线上推挤电子这件事情上。这就引出了**近共封装光学（Co-Packaged Optics, CPO）**与**硅光互连（Silicon Photonics）**的必然趋势。
Original English **Pat Gelsinger**: Look at the physics of energy distribution: performing a local math operation consumes picojoules or femtojoules, but driving that bit across a copper trace on an interposer or over a rack cable consumes hundreds or thousands of times more power! We are burning catastrophic amounts of power simply pushing electrons down copper wires. This makes co-packaged optics (CPO) and optical interconnects an architectural imperative.
**圭多·阿彭策勒**: 硅光技术已经被行业讨论了超过二十年，甚至更早以前就有人预言光互连将全面替代电互连。为什么直到今天它依然未能完全在大规模数据中心中普及？
Original English **Guido Appenzeller**: Silicon photonics has been heralded for over two decades as the inevitable successor to electrical signaling. Why has it taken so long, and why haven't we seen ubiquitous optical fabrics across hyperscale datacenters yet?
**帕特·基辛格**: 因为工程制造与供应链的成熟度需要漫长的沉淀。制造光学器件、激光源的可靠集成、光纤对准公差以及热稳定性，都是极其复杂的工业难题。铜互连具有极强的生命力，每次工程师以为铜线已经走到尽头时，新的均衡技术（DSP/Retimer）总能挤出最后的物理极限。然而，在数十万卡AI集群互联的今天，由于机架功耗高达数十千瓦乃至上百千瓦，铜线的物理退让空间已经彻底耗尽，光互连正迎来其真正不可替代的拐点时刻。
Original English **Pat Gelsinger**: Because component-level physics is easy compared to manufacturing supply chains at scale. Integrating lasers, maintaining sub-micron optical alignment tolerances, and managing thermal drift in harsh datacenter environments are grueling challenges. Furthermore, copper signaling has proved remarkably resilient—engineers keep inventing clever DSP and equalization tricks to extend its lifespan. But inside 100kW+ high-density AI clusters, electrical signaling has finally hit a hard wall. Photonics is transitioning from a luxury into an absolute structural necessity.
### 数据中心能源危机与物理学第一定律 **拉古·拉古拉姆**: 我们讨论了芯片与互连的优化，但所有这些AI集群最终都需要插上电网。目前在硅谷和全球科技界，最紧迫的瓶颈似乎已经不是买不到显卡，而是**电力短缺**。
Original English **Raghu Raghuram**: We've analyzed the silicon and fabric layers, but all of these massive AI clusters must ultimately plug into the grid. The dominant bottleneck today is no longer chip availability—it is raw electrical power capacity.
**帕特·基辛格**: 这正是现代计算工业最严酷的现实！过去几十年来，全社会的电力需求几乎保持平稳或低速增长，电网建设的投资节奏是以十年为周期的。一台大型重型燃气轮机的采购和交付周期现在长达6到8年，核能与输变电走廊的审批建设更是极为漫长。而科技巨头们却希望在18个月内上线百兆瓦乃至吉瓦级的数据中心，这造成了极度的供需错配。
Original English **Pat Gelsinger**: This is the harsh physical reality confronting modern computing! For decades, utility power demand grew at a sleepy 1-2% annually, and grid infrastructure was planned on decade-long cycles. Lead times for large gas turbines now stretch six to eight years, while nuclear and transmission permitting takes even longer. Hyperscalers want to deploy gigawatt-scale campuses in 18 months, colliding head-on with industrial reality.
**圭多·阿彭策勒**: 你如何看待各大巨头对可再生能源、小型模块化核反应堆（SMR）乃至核聚变（如Helion）的激进投资？
Original English **Guido Appenzeller**: What is your perspective on tech giants making unprecedented bets on renewables, small modular nuclear reactors (SMRs), and fusion startups like Helion?
**帕特·基辛格**: 面对基荷电力缺口，核能和清洁能源投资是必然的选择。风能和太阳能等间歇性能源无法满足AI数据中心24/7不间断的满负荷运转，我们必须依赖高密度的基荷能源。但更重要的是：**我们无法违反热力学第一定律**。如果单颗芯片每瓦特产生的算力（FLOPS/Watt）停止提升，仅靠建造发电厂是不可持续的。除了寻找新能源，我们必须在底层半导体工艺、超导计算和架构设计上实现质的飞跃，将能效比提升成百上千倍。
Original English **Pat Gelsinger**: Investing in high-density baseload power like nuclear is essential. Intermittent renewables alone cannot power 24/7 mission-critical datacenters operating at flatline utilization. But remember: you cannot negotiate with the laws of thermodynamics. If computational efficiency per watt stalls, merely building more reactors is an economic dead end. Alongside new energy generation, we must invent breakthrough semiconductors and superconducting systems that boost compute efficiency by orders of magnitude.
### AI代理时代的基础设施：新一代“虚拟化”架构 **拉古·拉古拉姆**: 作为曾经并肩作战领导VMware的搭档，我们过去二十年见证了虚拟化技术如何彻底重塑企业计算架构。如果我们今天从头设计一个面向AI原生世界的基础设施堆栈，它应该长什么样？
Original English **Raghu Raghuram**: As partners who spent years leading VMware together, we saw how virtualization transformed enterprise computing. If we were to design the foundational infrastructure stack for an AI-native world today from scratch, what would that look like?
**帕特·基辛格**: 这是一个极具启发性的问题！在传统时代，虚拟机的抽象层是为人类编写的应用程序和操作系统服务的；而在AI时代，最核心的计算实体变成了**智能体（AI Agents）**。未来的基础设施需要管理成千上万个自主协同的代理，我们需要为这些代理提供全生命周期的治理框架：谁来调度代理的资源？如何保障代理之间的通信安全与隐私边界？如何进行代理性能监控与容错恢复？
Original English **Pat Gelsinger**: That is a profound question! Historically, virtualization was designed to abstract underlying hardware for human operators and operating systems running monolithic applications. In this new era, the fundamental workload primitive is the autonomous AI agent. Tomorrow's infrastructure must orchestrate swarms of millions of agents. We need an abstraction layer that handles agent scheduling, zero-trust security boundaries, performance telemetry, and resilient lifecycle orchestration.
**拉古·拉古拉姆**: 换句话说，我们需要一个**“面向代理的虚拟化（VMware for Agents）”**架构，将底层的分布式异构算力抽象为高可靠、合规且安全的执行环境。
Original English **Raghu Raghuram**: In essence, we need a "VMware for Agents"—an abstraction layer that decouples application-level multi-agent workflows from messy, distributed physical infrastructure while providing isolation, compliance, and deterministic execution.
**帕特·基辛格**: 完全正确！历史总是在更高维度上重演。无论技术如何演变，操作系统的本质始终是对底层物理复杂性的优雅抽象。在AI代理时代，构建这种全新的系统级抽象不仅是工程挑战，更是巨大的商业机遇。
Original English **Pat Gelsinger**: Precisely! History rhymes across abstraction cycles. The essence of systems software has always been managing physical chaos through clean abstractions. Building this new systems fabric for autonomous agents is one of the most exciting frontiers in technology today.
**圭多·阿彭策勒**: 帕特，今天这场横跨半导体历史、物理极限与未来架构的深度对话令人叹为观止。非常感谢你抽出时间与我们分享这些真知灼见！
Original English **Guido Appenzeller**: Pat, this has been an extraordinary conversation spanning the history of silicon, hard physics limits, and next-generation architectures. Thank you so much for your time and insights!
**帕特·基辛格**: 谢谢拉古，谢谢圭多！能和老朋友们畅聊技术永远是最开心的事。期待下一次再聚！
Original English **Pat Gelsinger**: Thank you, Raghu, and thank you, Guido! It's always a pleasure catching up with great friends and discussing the future of technology. Let's do it again soon!